顶层指定RAM和sub_fun指定RAM规则问题

一、顶层数组指定1.顶层函数的参数是可以指定IO port的设计者可以指定这个你从Directive中就可以看出你会发现你的Directive中可以看到顶层函数的参数罗列但是你看不到自函数的参数的罗列这个也符合逻辑因为vivado hls工具就是不允许用户对子函数的参数指定协议因为这个协议只有vivado hls工具自己判定不允许用户来指定。void my_top(hls::streamap_axiuPIX_W*N_PIX,1,1,1 src,hls::streamap_axiuPIX_W*N_PIX,1,1,1 dst,ap_uint32 param_mem[1024]){#pragma HLS RESOURCE variableparam_mem coreRAM_2P_BRAM//这里指定为双口RAM会出问题#pragma HLS INTERFACE axis register both portsrc#pragma HLS INTERFACE axis register both portdst#pragma HLS INTERFACE s_axilite portreturn bundleCONTROL_BUS#pragma HLS INTERFACE s_axilite portparam_mem bundleCONTROL_BUSstatic struct cfg_info_s cfg_info;#pragma HLS RESOURCE variablecfg_info coreRAM_2P_LUTRAMap_uint32 t10;ap_uint32 t20;ap_uint32 t30;//注意param_cfg中接收param_mem[0]的数组或者指针将会自动的被综合综合工具综合为RAM_1P_BRAM也就是单口RAMparam_cfg(param_mem[0],t1,t2,t3,cfg_info[0]);}上述代码会出现问题因为子函数param_cfg和顶层函数my_top都会对param_mem指定规则用户和vivado hls工具指定的规则冲突了会报错。二、修改顶层优化void my_top(hls::streamap_axiuPIX_W*N_PIX,1,1,1 src,hls::streamap_axiuPIX_W*N_PIX,1,1,1 dst,ap_uint32 param_mem[1024]){//#pragma HLS RESOURCE variableparam_mem coreRAM_2P_BRAM//这里指定为双口RAM会出问题#pragma HLS INTERFACE axis register both portsrc#pragma HLS INTERFACE axis register both portdst#pragma HLS INTERFACE s_axilite portreturn bundleCONTROL_BUS#pragma HLS INTERFACE s_axilite portparam_mem bundleCONTROL_BUSstatic struct cfg_info_s cfg_info;#pragma HLS RESOURCE variablecfg_info coreRAM_2P_LUTRAMap_uint32 t10;ap_uint32 t20;ap_uint32 t30;//注意param_cfg中接收param_mem[0]的数组或者指针将会自动的被综合综合工具综合为RAM_1P_BRAM也就是单口RAMparam_cfg(param_mem[0],t1,t2,t3,cfg_info[0]);}将顶层的双口RAM指定注释掉后问题解决。三、如果想顶层和sub_function都指定双口RAM只能在内部加一个RAM缓存接收void my_top(hls::streamap_axiuPIX_W*N_PIX,1,1,1 src,hls::streamap_axiuPIX_W*N_PIX,1,1,1 dst,ap_uint32 param_mem[1024]){#pragma HLS RESOURCE variableparam_mem coreRAM_2P_BRAM//这里指定为双口RAM会出问题#pragma HLS INTERFACE axis register both portsrc#pragma HLS INTERFACE axis register both portdst#pragma HLS INTERFACE s_axilite portreturn bundleCONTROL_BUS#pragma HLS INTERFACE s_axilite portparam_mem bundleCONTROL_BUSstatic struct cfg_info_s cfg_info;#pragma HLS RESOURCE variablecfg_info coreRAM_2P_LUTRAMap_uint32 t10;ap_uint32 t20;ap_uint32 t30;ap_uint32 param_mem_t[300];#pragma HLS RESOURCE variableparam_mem_t coreRAM_2P_BRAMfor(ap_uint16 k0;k300;k){#pragma HLS PIPELINE II1param_mem_t[k] param_mem[k];//}//注意param_cfg中接收param_mem[0]的数组或者指针将会自动的被综合综合工具综合为RAM_1P_BRAM也就是单口RAMparam_cfg(param_mem_t[0],t1,t2,t3,cfg_info[0]);}如果按照这种方式进行处理那么子函数的RAM才是双口RAM.